For more information about hard faults, memory management faults, bus faults, and usage faults,
see “Fault Handling” on page 89.
Table 2-8. Exception Types
ActivationVector Address or
Offset
b
Priority
a
Vector
Number
Exception Type
Stack top is loaded from the first
entry of the vector table on reset.
0x0000.0000-0-
Asynchronous0x0000.0004-3 (highest)1Reset
Asynchronous0x0000.0008-22Non-Maskable Interrupt
(NMI)
-0x0000.000C-13Hard Fault
Synchronous0x0000.0010programmable
c
4Memory Management
Synchronous when precise and
asynchronous when imprecise
0x0000.0014programmable
c
5Bus Fault
Synchronous0x0000.0018programmable
c
6Usage Fault
Reserved--7-10-
Synchronous0x0000.002Cprogrammable
c
11SVCall
Synchronous0x0000.0030programmable
c
12Debug Monitor
Reserved--13-
Asynchronous0x0000.0038programmable
c
14PendSV
Asynchronous0x0000.003Cprogrammable
c
15SysTick
Asynchronous0x0000.0040 and aboveprogrammable
d
16 and aboveInterrupts
a. 0 is the default priority for all the programmable priorities.
b. See “Vector Table” on page 86.
c. See SYSPRI1 on page 138.
d. See PRIn registers on page 122.
Table 2-9. Interrupts
DescriptionVector Address or
Offset
Interrupt Number (Bit
in Interrupt Registers)
Vector Number
Processor exceptions0x0000.0000 -
0x0000.003C
-0-15
GPIO Port A0x0000.0040016
GPIO Port B0x0000.0044117
GPIO Port C0x0000.0048218
GPIO Port D0x0000.004C319
GPIO Port E0x0000.0050420
UART00x0000.0054521
UART10x0000.0058622
SSI00x0000.005C723
I
2
C00x0000.0060824
PWM Fault0x0000.0064925
PWM Generator 00x0000.00681026
PWM Generator 10x0000.006C1127
PWM Generator 20x0000.00701228
July 24, 201284
Texas Instruments-Production Data
The Cortex-M3 Processor
OBSOLETE: TI has discontinued production of this device.