■ PWM0: 0x4002.8000
Note that the PWM module clock must be enabled before the registers can be programmed (see
page 246). There must be a delay of 3 system clocks after the PWM module clock is enabled before
any PWM module registers are accessed.
Table 18-3. PWM Register Map
See
page
DescriptionResetTypeNameOffset
842PWM Master Control0x0000.0000R/WPWMCTL0x000
843PWM Time Base Sync0x0000.0000R/WPWMSYNC0x004
844PWM Output Enable0x0000.0000R/WPWMENABLE0x008
846PWM Output Inversion0x0000.0000R/WPWMINVERT0x00C
848PWM Output Fault0x0000.0000R/WPWMFAULT0x010
850PWM Interrupt Enable0x0000.0000R/WPWMINTEN0x014
852PWM Raw Interrupt Status0x0000.0000ROPWMRIS0x018
854PWM Interrupt Status and Clear0x0000.0000R/W1CPWMISC0x01C
856PWM Status0x0000.0000ROPWMSTATUS0x020
858PWM Fault Condition Value0x0000.0000R/WPWMFAULTVAL0x024
860PWM Enable Update0x0000.0000R/WPWMENUPD0x028
863PWM0 Control0x0000.0000R/WPWM0CTL0x040
868PWM0 Interrupt and Trigger Enable0x0000.0000R/WPWM0INTEN0x044
871PWM0 Raw Interrupt Status0x0000.0000ROPWM0RIS0x048
873PWM0 Interrupt Status and Clear0x0000.0000R/W1CPWM0ISC0x04C
875PWM0 Load0x0000.0000R/WPWM0LOAD0x050
876PWM0 Counter0x0000.0000ROPWM0COUNT0x054
877PWM0 Compare A0x0000.0000R/WPWM0CMPA0x058
878PWM0 Compare B0x0000.0000R/WPWM0CMPB0x05C
879PWM0 Generator A Control0x0000.0000R/WPWM0GENA0x060
882PWM0 Generator B Control0x0000.0000R/WPWM0GENB0x064
885PWM0 Dead-Band Control0x0000.0000R/WPWM0DBCTL0x068
886PWM0 Dead-Band Rising-Edge Delay0x0000.0000R/WPWM0DBRISE0x06C
887PWM0 Dead-Band Falling-Edge-Delay0x0000.0000R/WPWM0DBFALL0x070
888PWM0 Fault Source 00x0000.0000R/WPWM0FLTSRC00x074
890PWM0 Fault Source 10x0000.0000R/WPWM0FLTSRC10x078
893PWM0 Minimum Fault Period0x0000.0000R/WPWM0MINFLTPER0x07C
863PWM1 Control0x0000.0000R/WPWM1CTL0x080
839July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.