Register 29: Ethernet PHY Management Register 31 – PHY Special
Control/Status (MR31), address 0x1F
This register provides special control and status for the PHY layer.
Ethernet PHY Management Register 31 – PHY Special Control/Status (MR31)
Base 0x4004.8000
Address 0x1F
Type R/W, reset 0x0040
0123456789101112131415
SCRDIS
reserved
SPEEDreserved
AUTODONE
reserved
R/WR/WROROROROROROROROROROROR/WR/WR/WType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Important:
This bit field must always be written with a 0 to ensure
proper operation.
0x0R/Wreserved15:13
Auto Negotiation Done
DescriptionValue
Auto negotiation is complete.1
Auto negotiation is not complete.0
0ROAUTODONE12
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved11:5
HCD Speed Value
DescriptionValue
Reserved0x0
10BASE-T half duplex0x1
100BASE-T half duplex0x2
Reserved0x3-0x4
10BASE-T full duplex0x5
100BASE-T full duplex0x6
Reserved0x7
0x0ROSPEED4:2
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0R/Wreserved1
Scramble Disable
DescriptionValue
Disables data scrambling.1
Enables data scrambling.0
0R/WSCRDIS0
815July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.