Table 15-5. Write Field Decoding for I2CMCS[3:0] Field
Description
I2CMCS[3:0]I2CMSA[0]
Current
State
RUNSTARTSTOPACKR/S
START condition followed by TRANSMIT (master goes
to the Master Transmit state).
110X
a
0
Idle
START condition followed by a TRANSMIT and STOP
condition (master remains in Idle state).
111X0
START condition followed by RECEIVE operation with
negative ACK (master goes to the Master Receive state).
11001
START condition followed by RECEIVE and STOP
condition (master remains in Idle state).
11101
START condition followed by RECEIVE (master goes to
the Master Receive state).
11011
Illegal11111
NOPAll other combinations not listed are non-operations.
TRANSMIT operation (master remains in Master
Transmit state).
100XX
Master
Transmit
STOP condition (master goes to Idle state).001XX
TRANSMIT followed by STOP condition (master goes
to Idle state).
101XX
Repeated START condition followed by a TRANSMIT
(master remains in Master Transmit state).
110X0
Repeated START condition followed by TRANSMIT and
STOP condition (master goes to Idle state).
111X0
Repeated START condition followed by a RECEIVE
operation with a negative ACK (master goes to Master
Receive state).
11001
Repeated START condition followed by a TRANSMIT
and STOP condition (master goes to Idle state).
11101
Repeated START condition followed by RECEIVE
(master goes to Master Receive state).
11011
Illegal.11111
NOP.All other combinations not listed are non-operations.
July 24, 2012740
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface
OBSOLETE: TI has discontinued production of this device.