15 Inter-Integrated Circuit (I
2
C) Interface
The Inter-Integrated Circuit (I
2
C) bus provides bi-directional data transfer through a two-wire design
(a serial data line SDA and a serial clock line SCL), and interfaces to external I
2
C devices such as
serial memory (RAMs and ROMs), networking devices, LCDs, tone generators, and so on. The I
2
C
bus may also be used for system testing and diagnostic purposes in product development and
manufacture. The LM3S6G65 microcontroller includes two I
2
C modules, providing the ability to
interact (both transmit and receive) with other I
2
C devices on the bus.
The Stellaris
®
LM3S6G65 controller includes two I
2
C modules with the following features:
■ Devices on the I
2
C bus can be designated as either a master or a slave
– Supports both transmitting and receiving data as either a master or a slave
– Supports simultaneous master and slave operation
■ Four I
2
C modes
– Master transmit
– Master receive
– Slave transmit
– Slave receive
■ Two transmission speeds: Standard (100 Kbps) and Fast (400 Kbps)
■ Master and slave interrupt generation
– Master generates interrupts when a transmit or receive operation completes (or aborts due
to an error)
– Slave generates interrupts when data has been transferred or requested by a master or when
a START or STOP condition is detected
■ Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
719July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.