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LM3S6G65-IQC80-A2T

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型号: LM3S6G65-IQC80-A2T
PDF文件:
  • LM3S6G65-IQC80-A2T PDF文件
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功能描述: Stellaris® LM3S6G65 Microcontroller
PDF文件大小: 6152.12 Kbytes
PDF页数: 共1044页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S6G65-IQC80-A2T
PDF页面索引
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120%
To enable DMA operation for the receive channel, set the RXDMAE bit of the DMA Control
(UARTDMACTL) register. To enable DMA operation for the transmit channel, set the TXDMAE bit
of the UARTDMACTL register. The UART can also be configured to stop using DMA for the receive
channel if a receive error occurs. If the DMAERR bit of the UARTDMACR register is set and a receive
error occurs, the DMA receive requests are automatically disabled. This error condition can be
cleared by clearing the appropriate UART error interrupt.
If DMA is enabled, then the μDMA controller triggers an interrupt when a transfer is complete. The
interrupt occurs on the UART interrupt vector. Therefore, if interrupts are used for UART operation
and DMA is enabled, the UART interrupt handler must be designed to handle the μDMA completion
interrupt.
See “Micro Direct Memory Access (μDMA)” on page 348 for more details about programming the
μDMA controller.
13.4 Initialization and Configuration
To enable and initialize the UART, the following steps are necessary:
1. The peripheral clock must be enabled by setting the UART0, UART1, or UART2 bits in the RCGC1
register (see page 254).
2. The clock to the appropriate GPIO module must be enabled via the RCGC2 register in the
System Control module (see page 263).
3. Set the GPIO AFSEL bits for the appropriate pins (see page 430). To determine which GPIOs to
configure, see Table 21-4 on page 941.
4. Configure the GPIO current level and/or slew rate as specified for the mode selected (see
page 432 and page 440).
5. Configure the PMCnfields in the GPIOPCTL register to assign the UART signals to the appropriate
pins (see page 447 and Table 21-5 on page 948).
To use the UART, the peripheral clock must be enabled by setting the appropriate bit in the RCGC1
register (page 254). In addition, the clock to the appropriate GPIO module must be enabled via the
RCGC2 register (page 263) in the System Control module. To find out which GPIO port to enable,
refer to Table 21-5 on page 948.
This section discusses the steps that are required to use a UART module. For this example, the
UART clock is assumed to be 20 MHz, and the desired UART configuration is:
115200 baud rate
Data length of 8 bits
One stop bit
No parity
FIFOs disabled
No interrupts
625July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.
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