Register 37: ADC Sample Sequence 3 Digital Comparator Select (ADCSSDC3),
offset 0x0B4
This register determines which digital comparator receives the sample from the given conversion
on Sample Sequence 3 if the corresponding SnDCOP bit in the ADCSSOP3 register is set.
ADC Sample Sequence 3 Digital Comparator Select (ADCSSDC3)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x0B4
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0DCSELreserved
R/WR/WR/WR/WROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.000ROreserved31:4
Sample 0 Digital Comparator Select
When the S0DCOP bit in the ADCSSOP3 register is set, this field
indicates which digital comparator unit (and its associated set of control
registers) receives the sample from Sample Sequencer 3.
Note: Values not listed are reserved.
DescriptionValue
Digital Comparator Unit 0 (ADCDCCMP0 and ADCCCTL0)0x0
Digital Comparator Unit 1 (ADCDCCMP1 and ADCCCTL1)0x1
Digital Comparator Unit 2 (ADCDCCMP2 and ADCCCTL2)0x2
Digital Comparator Unit 3 (ADCDCCMP3 and ADCCCTL3)0x3
Digital Comparator Unit 4 (ADCDCCMP4 and ADCCCTL4)0x4
Digital Comparator Unit 5 (ADCDCCMP5 and ADCCCTL5)0x5
Digital Comparator Unit 6 (ADCDCCMP6 and ADCCCTL6)0x6
Digital Comparator Unit 7 (ADCDCCMP7 and ADCCCTL7)0x7
0x0R/WS0DCSEL3:0
603July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.