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LM3S6G65-IQC80-A2T

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型号: LM3S6G65-IQC80-A2T
PDF文件:
  • LM3S6G65-IQC80-A2T PDF文件
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功能描述: Stellaris® LM3S6G65 Microcontroller
PDF文件大小: 6152.12 Kbytes
PDF页数: 共1044页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S6G65-IQC80-A2T
PDF页面索引
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120%
DescriptionResetTypeNameBit/Field
Digital Comparator Interrupt on SS0
DescriptionValue
The raw interrupt signal from the digital comparators (INRDC
bit in the ADCRIS register) is sent to the interrupt controller on
the SS0 interrupt line.
1
The status of the digital comparators does not affect the SS0
interrupt status.
0
0R/WDCONSS016
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved15:4
SS3 Interrupt Mask
DescriptionValue
The raw interrupt signal from Sample Sequencer 3 (ADCRIS
register INR3 bit) is sent to the interrupt controller.
1
The status of Sample Sequencer 3 does not affect the SS3
interrupt status.
0
0R/WMASK33
SS2 Interrupt Mask
DescriptionValue
The raw interrupt signal from Sample Sequencer 2 (ADCRIS
register INR2 bit) is sent to the interrupt controller.
1
The status of Sample Sequencer 2 does not affect the SS2
interrupt status.
0
0R/WMASK22
SS1 Interrupt Mask
DescriptionValue
The raw interrupt signal from Sample Sequencer 1 (ADCRIS
register INR1 bit) is sent to the interrupt controller.
1
The status of Sample Sequencer 1 does not affect the SS1
interrupt status.
0
0R/WMASK11
SS0 Interrupt Mask
DescriptionValue
The raw interrupt signal from Sample Sequencer 0 (ADCRIS
register INR0 bit) is sent to the interrupt controller.
1
The status of Sample Sequencer 0 does not affect the SS0
interrupt status.
0
0R/WMASK00
July 24, 2012560
Texas Instruments-Production Data
Analog-to-Digital Converter (ADC)
OBSOLETE: TI has discontinued production of this device.
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