DescriptionResetTypeNameBit/Field
GPTM Timer B Event Mode
The TBEVENT values are defined as follows:
DescriptionValue
Positive edge0x0
Negative edge0x1
Reserved0x2
Both edges0x3
0x0R/WTBEVENT11:10
GPTM Timer B Stall Enable
The TBSTALL values are defined as follows:
DescriptionValue
Timer B continues counting while the processor is halted by the
debugger.
0
Timer B freezes counting while the processor is halted by the
debugger.
1
If the processor is executing normally, the TBSTALL bit is ignored.
0R/WTBSTALL9
GPTM Timer B Enable
The TBEN values are defined as follows:
DescriptionValue
Timer B is disabled.0
Timer B is enabled and begins counting or the capture logic is
enabled based on the GPTMCFG register.
1
0R/WTBEN8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved7
GPTM Timer A PWM Output Level
The TAPWML values are defined as follows:
DescriptionValue
Output is unaffected.0
Output is inverted.1
0R/WTAPWML6
GPTM Timer A Output Trigger Enable
The TAOTE values are defined as follows:
DescriptionValue
The output Timer A ADC trigger is disabled.0
The output Timer A ADC trigger is enabled.1
In addition, the ADC must be enabled and the timer selected as a trigger
source with the EMn bit in the ADCEMUX register (see page 566).
0R/WTAOTE5
July 24, 2012484
Texas Instruments-Production Data
General-Purpose Timers
OBSOLETE: TI has discontinued production of this device.