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LM3S6G65-IQC80-A2T

LM3S6G65-IQC80-A2T首页预览图
型号: LM3S6G65-IQC80-A2T
PDF文件:
  • LM3S6G65-IQC80-A2T PDF文件
  • LM3S6G65-IQC80-A2T PDF在线浏览
功能描述: Stellaris® LM3S6G65 Microcontroller
PDF文件大小: 6152.12 Kbytes
PDF页数: 共1044页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S6G65-IQC80-A2T
PDF页面索引
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120%
1.3.4.4 CCP Pins (see page 468)
Capture Compare PWM pins (CCP) can be used by the General-Purpose Timer Module to time/count
external events using the CCP pin as an input. Alternatively, the GPTM can generate a simple PWM
output on the CCP pin.
The LM3S6G65 microcontroller includes eight Capture Compare PWM pins (CCP) that can be
programmed to operate in the following modes:
Capture: The GP Timer is incremented/decremented by programmed events on the CCP input.
The GP Timer captures and stores the current timer value when a programmed event occurs.
Compare: The GP Timer is incremented/decremented by programmed events on the CCP input.
The GP Timer compares the current value with a stored value and generates an interrupt when
a match occurs.
PWM: The GP Timer is incremented/decremented by the system clock. A PWM signal is generated
based on a match between the counter value and a value stored in a match register and is output
on the CCP pin.
1.3.4.5 Hibernation Module (see page 276)
The Hibernation module provides logic to switch power off to the main processor and peripherals
and to wake on external or time-based events. The Hibernation module includes power-sequencing
logic and has the following features:
32-bit real-time counter (RTC)
Two 32-bit RTC match registers for timed wake-up and interrupt generation
RTC predivider trim for making fine adjustments to the clock rate
Two mechanisms for power control
System power control using discrete external regulator
On-chip power control using internal switches under register control
Dedicated pin for waking using an external signal
RTC operational and hibernation memory valid as long as V
BAT
is valid
Low-battery detection, signaling, and interrupt generation
Clock source from a 32.768-kHz external oscillator or a 4.194304-MHz crystal; 32.768-kHz
external oscillator can be used for main controller clock
64 32-bit words of battery-backed memory to save state during hibernation
Programmable interrupts for RTC match, external wake, and low battery events
1.3.4.6 Watchdog Timers (see page 508)
A watchdog timer is used to regain control when a system has failed due to a software error or to
the failure of an external device to respond in the expected way. The Stellaris Watchdog Timer can
generate an interrupt or a reset when a time-out value is reached. In addition, the Watchdog Timer
is ARM FiRM-compliant and can be configured to generate an interrupt to the microcontroller on its
47July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.
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