DescriptionResetTypeNameBit/Field
GPIO Commit
DescriptionValue
The corresponding GPIOAFSEL, GPIOPUR, GPIOPDR, or
GPIODEN bits can be written.
1
The corresponding GPIOAFSEL, GPIOPUR, GPIOPDR, or
GPIODEN bits cannot be written.
0
Note: The default register type for the GPIOCR register is RO for
all GPIO pins with the exception of the NMI pin and the four
JTAG/SWD pins (PB7 and PC[3:0]). These five pins are the
only GPIOs that are protected by the GPIOCR register.
Because of this, the register type for GPIO Port B7 and GPIO
Port C[3:0] is R/W.
The default reset value for the GPIOCR register is
0x0000.00FF for all GPIO pins, with the exception of the NMI
pin and the four JTAG/SWD pins (PB7 and PC[3:0]). To
ensure that the JTAG port is not accidentally programmed as
GPIO pins, the PC[3:0] pins default to non-committable.
Similarly, to ensure that the NMI pin is not accidentally
programmed as a GPIO pin, the PB7 pin defaults to
non-committable. Because of this, the default reset value of
GPIOCR for GPIO Port B is 0x0000.007F while the default
reset value of GPIOCR for Port C is 0x0000.00F0.
--CR7:0
445July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.