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LM3S6G65-IQC80-A2T

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型号: LM3S6G65-IQC80-A2T
PDF文件:
  • LM3S6G65-IQC80-A2T PDF文件
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功能描述: Stellaris® LM3S6G65 Microcontroller
PDF文件大小: 6152.12 Kbytes
PDF页数: 共1044页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S6G65-IQC80-A2T
PDF页面索引
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120%
Each channel also has a configurable arbitration size. The arbitration size is the number of items
that are transferred in a burst before the μDMA controller rearbitrates for channel priority. Using the
arbitration size, it is possible to control exactly how many items are transferred to or from a peripheral
each time it makes a μDMA service request.
8.2.1 Channel Assignments
μDMA channels 0-31 are assigned to peripherals according to the following table. The DMA Channel
Assignment (DMACHASGN) register (see page 397) can be used to specify the primary or secondary
assignment. If the primary function is not available on this microcontroller, the secondary function
becomes the primary function. If the secondary function is not available, the primary function is the
only option.
Note: Channels noted in the table as "Available for software" may be assigned to peripherals in
the future. However, they are currently available for software use. Channel 30 is dedicated
for software use.
Because of the way the μDMA controller interacts with peripherals, the μDMA channel for
the peripheral must be enabled in order for the μDMA controller to be able to read and write
the peripheral registers, even if a different μDMA channel is used to perform the μDMA
transfer. To minimize confusion and chance of software errors, it is best practice to use a
peripheral's μDMA channel for performing all μDMA transfers for that peripheral, even if it
is processor-triggered and using AUTO mode, which could be considered a software transfer.
Note that if the software channel is used, interrupts occur on the dedicated μDMA interrupt
vector. If the peripheral channel is used, then the interrupt occurs on the interrupt vector
for the peripheral.
Table 8-1. μDMA Channel Assignments
Secondary AssignmentPrimary AssignmentμDMA Channel
UART2 ReceiveAvailable for software0
UART2 TransmitAvailable for software1
General-Purpose Timer 3AAvailable for software2
General-Purpose Timer 3BAvailable for software3
General-Purpose Timer 2AAvailable for software4
General-Purpose Timer 2BAvailable for software5
General-Purpose Timer 2AEthernet Receive6
General-Purpose Timer 2BEthernet Transmit7
Available for softwareUART0 Receive8
Available for softwareUART0 Transmit9
SSI1 ReceiveSSI0 Receive10
SSI1 TransmitSSI0 Transmit11
UART2 ReceiveAvailable for software12
UART2 TransmitAvailable for software13
General-Purpose Timer 2AADC0 Sample Sequencer 014
General-Purpose Timer 2BADC0 Sample Sequencer 115
Available for softwareADC0 Sample Sequencer 216
Available for softwareADC0 Sample Sequencer 317
General-Purpose Timer 1AGeneral-Purpose Timer 0A18
General-Purpose Timer 1BGeneral-Purpose Timer 0B19
July 24, 2012350
Texas Instruments-Production Data
Micro Direct Memory Access (μDMA)
OBSOLETE: TI has discontinued production of this device.
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