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LM3S6G65-IQC80-A2T

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型号: LM3S6G65-IQC80-A2T
PDF文件:
  • LM3S6G65-IQC80-A2T PDF文件
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功能描述: Stellaris® LM3S6G65 Microcontroller
PDF文件大小: 6152.12 Kbytes
PDF页数: 共1044页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S6G65-IQC80-A2T
PDF页面索引
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120%
Register 14: Boot Configuration (BOOTCFG), offset 0x1D0
Note: Offset is relative to System Control base address of 0x400FE000.
This register provides configuration of a GPIO pin to enable the ROM Boot Loader as well as a
write-once mechanism to disable external debugger access to the device. Upon reset, the user has
the opportunity to direct the core to execute the ROM Boot Loader or the application in Flash memory
by using any GPIO signal from Ports A-H as configured by the bits in this register. If the EN bit is
set or the specified pin does not have the required polarity, the system control module checks
address 0x000.0004 to see if the Flash memory has a valid reset vector. If the data at address
0x0000.0004 is 0xFFFF.FFFF, then it is assumed that the Flash memory has not yet been
programmed, and the core executes the ROM Boot Loader. The DBG0 bit (bit 0) is set to 0 from
the factory and the DBG1 bit (bit 1) is set to 1, which enables external debuggers. Clearing the
DBG1 bit disables any external debugger access to the device permanently, starting with the next
power-up cycle of the device. The NW bit (bit 31) indicates that the register has not yet been
committed and is controlled through hardware to ensure that the register is only committed once.
Prior to being committed, bits can only be changed from 1 to 0. The reset value shown only applies
to power-on reset; any other type of reset does not affect this register. Once committed, the only
way to restore the factory default value of this register is to perform the sequence detailed in
“Recovering a "Locked" Microcontroller” on page 169.
Boot Configuration (BOOTCFG)
Base 0x400F.E000
Offset 0x1D0
Type R/W, reset 0xFFFF.FFFE
16171819202122232425262728293031
reservedNW
ROROROROROROROROROROROROROROROR/WType
1111111111111111Reset
0123456789101112131415
DBG0DBG1reservedENPOLPINPORT
R/WR/WROROROROROROR/WR/WR/WR/WR/WR/WR/WR/WType
0111111111111111Reset
DescriptionResetTypeNameBit/Field
Not Written
When set, this bit indicates that this 32-bit register has not been
committed. When clear, this bit specifies that this register has been
committed and may not be committed again.
1R/WNW31
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x7FFFROreserved30:16
July 24, 2012328
Texas Instruments-Production Data
Internal Memory
OBSOLETE: TI has discontinued production of this device.
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