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LM3S6G65-IQC80-A2T

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型号: LM3S6G65-IQC80-A2T
PDF文件:
  • LM3S6G65-IQC80-A2T PDF文件
  • LM3S6G65-IQC80-A2T PDF在线浏览
功能描述: Stellaris® LM3S6G65 Microcontroller
PDF文件大小: 6152.12 Kbytes
PDF页数: 共1044页
制造商: TI1[Texas Instruments]
制造商LOGO: TI1[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝LM3S6G65-IQC80-A2T
PDF页面索引
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120%
DescriptionResetTypeNameBit/Field
Commit Register Value
This bit is used to commit writes to Flash-memory-resident registers
and to monitor the progress of that process.
DescriptionValue
Set this bit to commit (write) the register value to a
Flash-memory-resident register.
When read, a 1 indicates that the previous commit access is
not complete.
1
A write of 0 has no effect on the state of this bit.
When read, a 0 indicates that the previous commit access is
complete.
0
See “Non-Volatile Register Programming” on page 310 for more
information on programming Flash-memory-resident registers.
0R/WCOMT3
Mass Erase Flash Memory
This bit is used to mass erase the Flash main memory and to monitor
the progress of that process.
DescriptionValue
Set this bit to erase the Flash main memory.
When read, a 1 indicates that the previous mass erase access
is not complete.
1
A write of 0 has no effect on the state of this bit.
When read, a 0 indicates that the previous mass erase access
is complete.
0
For information on erase time, see “Flash Memory” on page 991.
0R/WMERASE2
Erase a Page of Flash Memory
This bit is used to erase a page of Flash memory and to monitor the
progress of that process.
DescriptionValue
Set this bit to erase the Flash memory page specified by the
contents of the FMA register.
When read, a 1 indicates that the previous page erase access
is not complete.
1
A write of 0 has no effect on the state of this bit.
When read, a 0 indicates that the previous page erase access
is complete.
0
For information on erase time, see “Flash Memory” on page 991.
0R/WERASE1
July 24, 2012316
Texas Instruments-Production Data
Internal Memory
OBSOLETE: TI has discontinued production of this device.
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