7 Internal Memory
The LM3S6G65 microcontroller comes with 64 KB of bit-banded SRAM, internal ROM,and 384 KB
of Flash memory. The Flash memory controller provides a user-friendly interface, making Flash
memory programming a simple task. Flash memory protection can be applied to the Flash memory
on a 2-KB block basis.
7.1 Block Diagram
Figure 7-1 on page 303 illustrates the internal memory blocks and control logic. The dashed boxes
in the figure indicate registers residing in the System Control module.
Figure 7-1. Internal Memory Block Diagram
ROM Control
RMCTL
ROM Array
Flash Control
Flash Write Buffer
FMA
FMD
FCIM
FCMISC
Flash Array
Cortex-M3
Bridge
SRAM Array
System
Bus
Icode Bus
Dcode Bus
Flash Protection
FMPRE
FMPPE
Flash Timing
USECRL
Flash Protection
FMPREn
FMPPEn
User Registers
BOOTCFG
USER_REG0
USER_REG1
USER_REG2
USER_REG3
FMC
FCRIS
FMC2
FWBVAL
FWBn
32 words
7.2 Functional Description
This section describes the functionality of the SRAM, ROM, and Flash memories.
Note: The μDMA controller can transfer data to and from the on-chip SRAM. However, because
the Flash memory and ROM are located on a separate internal bus, it is not possible to
transfer data from the Flash memory or ROM with the μDMA controller.
303July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.