Register 37: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................. 879
Register 38: PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................. 879
Register 39: PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................. 882
Register 40: PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................. 882
Register 41: PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................. 882
Register 42: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................. 885
Register 43: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................. 885
Register 44: PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................. 885
Register 45: PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C .............................. 886
Register 46: PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC .............................. 886
Register 47: PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC .............................. 886
Register 48: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 .............................. 887
Register 49: PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 .............................. 887
Register 50: PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 .............................. 887
Register 51: PWM0 Fault Source 0 (PWM0FLTSRC0), offset 0x074 .................................................... 888
Register 52: PWM1 Fault Source 0 (PWM1FLTSRC0), offset 0x0B4 .................................................... 888
Register 53: PWM2 Fault Source 0 (PWM2FLTSRC0), offset 0x0F4 .................................................... 888
Register 54: PWM0 Fault Source 1 (PWM0FLTSRC1), offset 0x078 .................................................... 890
Register 55: PWM1 Fault Source 1 (PWM1FLTSRC1), offset 0x0B8 .................................................... 890
Register 56: PWM2 Fault Source 1 (PWM2FLTSRC1), offset 0x0F8 .................................................... 890
Register 57: PWM0 Minimum Fault Period (PWM0MINFLTPER), offset 0x07C ..................................... 893
Register 58: PWM1 Minimum Fault Period (PWM1MINFLTPER), offset 0x0BC ..................................... 893
Register 59: PWM2 Minimum Fault Period (PWM2MINFLTPER), offset 0x0FC ..................................... 893
Register 60: PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800 ............................................ 894
Register 61: PWM1 Fault Pin Logic Sense (PWM1FLTSEN), offset 0x880 ............................................ 894
Register 62: PWM2 Fault Pin Logic Sense (PWM2FLTSEN), offset 0x900 ............................................ 894
Register 63: PWM3 Fault Pin Logic Sense (PWM3FLTSEN), offset 0x980 ............................................ 894
Register 64: PWM0 Fault Status 0 (PWM0FLTSTAT0), offset 0x804 .................................................... 895
Register 65: PWM1 Fault Status 0 (PWM1FLTSTAT0), offset 0x884 .................................................... 895
Register 66: PWM2 Fault Status 0 (PWM2FLTSTAT0), offset 0x904 .................................................... 895
Register 67: PWM0 Fault Status 1 (PWM0FLTSTAT1), offset 0x808 .................................................... 897
Register 68: PWM1 Fault Status 1 (PWM1FLTSTAT1), offset 0x888 .................................................... 897
Register 69: PWM2 Fault Status 1 (PWM2FLTSTAT1), offset 0x908 .................................................... 897
Quadrature Encoder Interface (QEI) .......................................................................................... 900
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 907
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 910
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 911
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 912
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 913
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 914
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 915
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 916
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 917
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 919
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ..................................................... 921
July 24, 201228
Texas Instruments-Production Data
Table of Contents
OBSOLETE: TI has discontinued production of this device.