6.1 Block Diagram
Figure 6-1. Hibernation Module Block Diagram
HIBIM
HIBRIS
HIBMIS
HIBIC
HIBRTCT
Pre-Divider
/128
XOSC0
XOSC1
HIBCTL.CLK32EN
HIBCTL.CLKSEL
HIBRTCC
HIBRTCLD
HIBRTCM0
HIBRTCM1
RTC
Interrupts
Power
Sequence
Logic
Low Battery
Detect
LOWBAT
V
BAT
HIBCTL.LOWBATEN
HIBCTL.PWRCUT
HIBCTL.EXTWEN
HIBCTL.RTCWEN
HIBCTL.VABORT
Battery-Backed
Memory
64 words
HIBDATA
HIBCTL.HIBREQ
WAKE
HIB
Clock Source for
System Clock
Interrupts
to CPU
HIBCTL.RTCEN
MATCH0/1
6.2 Signal Description
The following table lists the external signals of the Hibernation module and describes the function
of each. These signals have dedicated functions and are not alternate functions for any GPIO signals.
Table 6-1. Hibernate Signals (100LQFP)
DescriptionBuffer Type
a
Pin TypePin Mux / Pin
Assignment
Pin NumberPin Name
An output that indicates the processor is in
Hibernate mode.
ODOfixed51HIB
Power source for the Hibernation module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation module power-source supply.
Power-fixed55VBAT
An external input that brings the processor out of
Hibernate mode when asserted.
TTLIfixed50WAKE
Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
AnalogIfixed52XOSC0
Hibernation module oscillator crystal output. Leave
unconnected when using a single-ended clock
source.
AnalogOfixed53XOSC1
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
277July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.
