Register 9: GPTM Timer A Interval Load (GPTMTAILR), offset 0x028 ................................................ 496
Register 10: GPTM Timer B Interval Load (GPTMTBILR), offset 0x02C ................................................ 497
Register 11: GPTM Timer A Match (GPTMTAMATCHR), offset 0x030 .................................................. 498
Register 12: GPTM Timer B Match (GPTMTBMATCHR), offset 0x034 ................................................. 499
Register 13: GPTM Timer A Prescale (GPTMTAPR), offset 0x038 ....................................................... 500
Register 14: GPTM Timer B Prescale (GPTMTBPR), offset 0x03C ...................................................... 501
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 502
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 503
Register 17: GPTM Timer A (GPTMTAR), offset 0x048 ....................................................................... 504
Register 18: GPTM Timer B (GPTMTBR), offset 0x04C ....................................................................... 505
Register 19: GPTM Timer A Value (GPTMTAV), offset 0x050 ............................................................... 506
Register 20: GPTM Timer B Value (GPTMTBV), offset 0x054 .............................................................. 507
Watchdog Timers ......................................................................................................................... 508
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 512
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 513
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 514
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 516
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 517
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 518
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 519
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 520
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 521
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 522
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 523
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 524
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 525
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 526
Register 15: Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 527
Register 16: Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 528
Register 17: Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 529
Register 18: Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 530
Register 19: Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 531
Register 20: Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 532
Analog-to-Digital Converter (ADC) ............................................................................................. 533
Register 1: ADC Active Sample Sequencer (ADCACTSS), offset 0x000 ............................................. 556
Register 2: ADC Raw Interrupt Status (ADCRIS), offset 0x004 ........................................................... 557
Register 3: ADC Interrupt Mask (ADCIM), offset 0x008 ..................................................................... 559
Register 4: ADC Interrupt Status and Clear (ADCISC), offset 0x00C .................................................. 561
Register 5: ADC Overflow Status (ADCOSTAT), offset 0x010 ............................................................ 564
Register 6: ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ................................................. 566
Register 7: ADC Underflow Status (ADCUSTAT), offset 0x018 ........................................................... 571
Register 8: ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ............................................. 572
Register 9: ADC Sample Phase Control (ADCSPC), offset 0x024 ...................................................... 574
Register 10: ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ................................. 576
Register 11: ADC Sample Averaging Control (ADCSAC), offset 0x030 ................................................. 578
Register 12: ADC Digital Comparator Interrupt Status and Clear (ADCDCISC), offset 0x034 ................. 579
Register 13: ADC Control (ADCCTL), offset 0x038 ............................................................................. 581
Register 14: ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............... 582
23July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.