DescriptionResetTypeNameBit/Field
Invalid State Usage Fault
DescriptionValue
A usage fault has not been caused by an invalid state.0
The processor has attempted to execute an instruction that
makes illegal use of the EPSR register.
1
When this bit is set, the PC value stacked for the exception return points
to the instruction that attempted the illegal use of the Execution
Program Status Register (EPSR) register.
This bit is not set if an undefined instruction uses the EPSR register.
This bit is cleared by writing a 1 to it.
0R/W1CINVSTAT17
Undefined Instruction Usage Fault
DescriptionValue
A usage fault has not been caused by an undefined instruction.0
The processor has attempted to execute an undefined
instruction.
1
When this bit is set, the PC value stacked for the exception return points
to the undefined instruction.
An undefined instruction is an instruction that the processor cannot
decode.
This bit is cleared by writing a 1 to it.
0R/W1CUNDEF16
Bus Fault Address Register Valid
DescriptionValue
The value in the Bus Fault Address (FAULTADDR) register
is not a valid fault address.
0
The FAULTADDR register is holding a valid fault address.1
This bit is set after a bus fault, where the address is known. Other faults
can clear this bit, such as a memory management fault occurring later.
If a bus fault occurs and is escalated to a hard fault because of priority,
the hard fault handler must clear this bit. This action prevents problems
if returning to a stacked active bus fault handler whose FAULTADDR
register value has been overwritten.
This bit is cleared by writing a 1 to it.
0R/W1CBFARV15
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved14:13
147July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.
