Figure 17-2. Structure of Comparator Unit .............................................................................. 818
Figure 17-3. Comparator Internal Reference Structure ............................................................ 818
Figure 18-1. PWM Module Diagram ....................................................................................... 830
Figure 18-2. PWM Generator Block Diagram .......................................................................... 830
Figure 18-3. PWM Count-Down Mode .................................................................................... 833
Figure 18-4. PWM Count-Up/Down Mode .............................................................................. 834
Figure 18-5. PWM Generation Example In Count-Up/Down Mode ........................................... 834
Figure 18-6. PWM Dead-Band Generator ............................................................................... 835
Figure 19-1. QEI Block Diagram ............................................................................................ 901
Figure 19-2. Quadrature Encoder and Velocity Predivider Operation ........................................ 903
Figure 20-1. 100-Pin LQFP Package Pin Diagram .................................................................. 923
Figure 20-2. 108-Ball BGA Package Pin Diagram (Top View) ................................................... 924
Figure 23-1. Load Conditions ................................................................................................ 982
Figure 23-2. JTAG Test Clock Input Timing ............................................................................. 983
Figure 23-3. JTAG Test Access Port (TAP) Timing .................................................................. 983
Figure 23-4. Power-On Reset Timing ..................................................................................... 984
Figure 23-5. Brown-Out Reset Timing .................................................................................... 984
Figure 23-6. Power-On Reset and Voltage Parameters ........................................................... 985
Figure 23-7. External Reset Timing (RST) .............................................................................. 985
Figure 23-8. Software Reset Timing ....................................................................................... 985
Figure 23-9. Watchdog Reset Timing ..................................................................................... 986
Figure 23-10. MOSC Failure Reset Timing ............................................................................... 986
Figure 23-11. Hibernation Module Timing with Internal Oscillator Running in Hibernation ............ 990
Figure 23-12. Hibernation Module Timing with Internal Oscillator Stopped in Hibernation ............ 991
Figure 23-13. ADC Input Equivalency Diagram ......................................................................... 993
Figure 23-14. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................... 994
Figure 23-15. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ................. 994
Figure 23-16. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ..................................... 995
Figure 23-17. I
2
C Timing ......................................................................................................... 996
Figure 23-18. External XTLP Oscillator Characteristics ............................................................. 998
Figure C-1. Stellaris LM3S6G65 100-Pin LQFP Package Dimensions ................................... 1035
Figure C-2. 100-Pin LQFP Tray Dimensions ........................................................................ 1037
Figure C-3. 100-Pin LQFP Tape and Reel Dimensions ......................................................... 1038
Figure C-4. Stellaris LM3S6G65 108-Ball BGA Package Dimensions .................................... 1039
Figure C-5. 108-Ball BGA Tray Dimensions ......................................................................... 1041
Figure C-6. 108-Ball BGA Tape and Reel Dimensions .......................................................... 1042
13July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.