Register 29: Auxiliary Control (ACTLR), offset 0x008
Note: This register can only be accessed from privileged mode.
The ACTLR register provides disable bits for IT folding, write buffer use for accesses to the default
memory map, and interruption of multi-cycle instructions. By default, this register is set to provide
optimum performance from the Cortex-M3 processor and does not normally require modification.
Auxiliary Control (ACTLR)
Base 0xE000.E000
Offset 0x008
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
DISMCYCDISWBUFDISFOLDreserved
R/WR/WR/WROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:3
Disable IT Folding
DescriptionValue
No effect.0
Disables IT folding.1
In some situations, the processor can start executing the first instruction
in an IT block while it is still executing the IT instruction. This behavior
is called IT folding, and improves performance, However, ITfolding can
cause jitter in looping. If a task must avoid jitter, set the DISFOLD bit
before executing the task, to disable IT folding.
0R/WDISFOLD2
Disable Write Buffer
DescriptionValue
No effect.0
Disables write buffer use during default memory map accesses.
In this situation, all bus faults are precise bus faults but
performance is decreased because any store to memory must
complete before the processor can execute the next instruction.
1
Note: This bit only affects write buffers implemented in the
Cortex-M3 processor.
0R/WDISWBUF1
125July 24, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S6G65 Microcontroller
OBSOLETE: TI has discontinued production of this device.
