Internal Memory
96 October 8, 2006
Preliminary
7.3.2 Flash Programming
The Stellaris devices provide a user-friendly interface for flash programming. All erase/program
operations are handled via three registers: FMA, FMD and FMC.
The flash is programmed using the following sequence:
1. Write source data to the FMD register.
2. Write the target address to the FMA register.
3. Write the flash write key and the WRITE bit (a value of 0xA4420001) to the FMC register.
4. Poll the FMC register until the WRITE bit is cleared.
To perform an erase of a 1-KB page:
1. Write the page address to the FMA register.
2. Write the flash write key and the ERASE bit (a value of 0xA4420002) to the FMC register.
3. Poll the FMC register until the ERASE bit is cleared.
To perform a mass erase of the flash:
1. Write the flash write key and the MERASE bit (a value of 0xA4420004) to the FMC register.
2. Poll the FMC register until the MERASE bit is cleared.
7.4 Register Map
Table 7-2 lists the Flash memory and control registers. The offset listed is a hexadecimal
increment to the register’s address, relative to the Flash control base address of 0x400FD000,
except for FMPRE and FMPPE, which are relative to the System Control base address of
0x400FE000.
Table 7-2. Flash Register Map
Offset Name Reset Type Description
See
page
0x130
a
a. Relative to System Control base address of 0x400FE000.
FMPRE 0xFFFF R/W0 Flash me mo ry read prot ect 98
0x134
a
FMPPE 0xFFFF R/W0 Flash memory program prot ect 98
0X140
a
USECRL 0x31 R/W USec reload 99
0x000 FMA 0x0 000 0000 R/W Flash memory addre ss 100
0x004 FMD 0x00000000 R/W Flash memo ry data 101
0x008 FMC 0x00000000 R/W Flash memo ry con trol 102
0x00C FCRIS 0x00000000 RO Flash controller raw interrupt status 104
0x010 FCIM 0x00000000 R/W Flash controller interrupt mask 105
0x014 FCMISC 0x00000000 R/W1C Flash controller masked interrupt status and clear 106
