System Control
78 October 8, 2006
Preliminary
Register 16: Reset Cause (RESC), offset 0x05C
This field specifies the cause of the reset event to software. The reset value is determined by the
cause of the reset. When an external reset is the cause (EXT is set), all other reset bits are
cleared. However, if the reset is due to any other cause, the remaining bits are sticky, allowing
software to see all causes.
Bit/Field Name Type Reset Description
31:6 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
5 LDO R/W - When set to 1, LD O powe r OK lost is the cau se of the res et
event.
4 SW R/W - When set to 1, a software reset is the cause of the reset
event.
3 WDT R/W - When set to 1, a watchdog reset is the cause of the reset
event.
2 BOR R/W - When set to 1, a brown-out reset is the cause of the reset
event.
1 POR R/W - When set to 1, a power-on reset is the cause of the reset
event.
0 EXT R/W - When set to 1, an external reset (RST
assertion) is the
cause of the reset event.
reserved
RO
0
Reset Cause (RESC)
Offset 0x05C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000- - - - - -
RO RO RO RO RO RO RO RO RO R/W R/W R/W R/W R/W R/W
reserved
WDT BOR POR EXTSWLDO