System Control
74 October 8, 2006
Preliminary
Register 13: Raw Interrupt Status (RIS), offset 0x050
Central location for system control raw interrupts. These are set and cleared by hardware.
Bit/Field Name Type Reset Description
31:7 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
6 PLLLRIS RO 0 PLL Lock Raw Interrupt Status
This bit is set when the PLL T
READY
Timer asserts.
5 CLRIS RO 0 Current Limit Raw Interrupt Status
This bit is set if the LDO’s CLE output asserts.
4 IOFRIS RO 0 Internal Oscillator Fault Raw Interrupt Status
This bit is set if an internal oscillator fault is detected.
3 MOFRIS RO 0 Main Oscillator Fault Raw Interrupt Status
This bit is set if a main oscillator fault is detected.
2 LDORIS RO 0 LDO Power Unregulated Raw Interrupt Status
This bit is set if a LDO voltage is unregulated.
1 BORRIS RO 0 Brown-Out Reset Raw Interrupt Status
This bit is the raw in terrupt status for any brown-out
conditions. If set, a brown-out condition was detected. An
interrupt is reported if the BORIM bit in the IMC register is
set and the BORIOR bit in the PBORCTL register is clea red.
0 PLLFRIS RO 0 PLL Fault Raw Interrupt Status
This bit is set if a PLL fault is detected (stops oscillating).
RO
0
Raw Interrupt Status (RIS)
Offset 0x050
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
reserved
PLLLRISreserved CLRIS IOFRIS MOFRIS
LDORIS
BORRIS PLLFRIS