LM3S610 Data Sheet
October 8, 2006 73
Preliminary
Register 12: Software Reset Control 2 (SRCR2), offset 0x048
Writes to this register are masked by the bits in the Device Capabilities 4 (DC4) register (see
page 68).
Bit/Field Name Type Reset Description
31:5 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
4 PORTE R/W 0 Reset control for GPIO Port E.
3 PORTD R/W 0 Reset control for GPIO Port D.
2 PORTC R/W 0 Reset control for GPIO Port C.
1 PORTB R/W 0 Reset control for GPIO Port B.
0 PORTA R/W 0 Reset control for GPIO Port A.
RO
0
Software Reset Control (SRCR2)
Offset 0x048
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO R/W R/W R/W R/W R/W
PORTE PORTD PORTC PORTB PORTA
reserved
reserved