LM3S610 Data Sheet
October 8, 2006 57
Preliminary
6.2 Initialization and Configuration
The PLL is configured using direct register writes to the Run-Mode Clock Configuration (RCC)
register. The steps required to successfully change the PLL-based system clock are:
1. Bypass the PLL and system clock divider by setting the BYPASS bit and clearing the USESYS
bit in the RCC register. This configures the system to run off a “raw” clock source (using the
main oscillator or internal oscillator) and allows for the new PLL configuration to be validated
before switching the system clock to the PLL.
2. S elect the crystal value (XTAL) and oscillator source (OSCSRC), and clear the PWRDN and OE
bits in RCC. Setting the XTAL field automatically pulls valid PLL configuration data for the
appropriate crystal, and clearing the PWRDN and OE bits powers and enables the PLL and its
output.
3. S ele ct th e de si red sys t em div id e r (SYSDIV) and set the USESYS bit in RCC. The SYSDIV field
determines the system frequency for the microcontroller.
4. Wait for the PLL to lock by polling the PLLLRIS bit in the Raw Interr upt S tatus (RIS) register.
If the PLL doesn’t lock, the con fig ur ation is inva li d.
5. Enable use of the PLL by clearing the BYPASS bit in RCC.
Important: If the BYPASS bit is clea red before the PLL locks, it is possible to render the device
unusable.
6.3 Register Map
Table 6-1 lists the System Control registers, grouped by function. The offset listed is a
hexadecimal increment to the register’s address, relative to the System Control base address of
0x400FE000.
Table 6-1. System Control Register Map (Sheet 1 of 2)
Offset Name Reset Type Description
See
page
Device Identification and Capabilities
0x000 DID0 - RO Device identification 0 59
0x004 DID1 - RO Device identification 1 60
0x008 DC0 0x001F000F RO Device capabilities 0 62
0x010 DC1 0x00000003 RO Device capabilities 1 63
0x014 DC2 0x00071013 RO Device capabilities 2 65
0x018 DC3 0x3F03003F RO Device Capabilities 3 66
0x01C DC4 0x0000001F RO Device Capabilities 4 68
Local Control
0x030 PBORCTL 0x00007FFD R/W Power-On and Brown-Out Reset Control 69
0x034 LDOPCTL 0x00000000 R/W LDO Power Control 70
0x040 SRCR0 0x00000000 R/W Software Reset Control 0 71
