Pin Diagram
366 October 8, 2006
Preliminary
16 Pin Diagram
Figure 16-1 shows the pin diagram and pin-to-signal-name mapping.
Figure 16-1. Pin Connection Diagram
1 36
13 48
2
14
5
6
3
4
7
8
11
9
10
47
15
46
16 45
17 44
18
43
19
42
20 41
21 40
22
39
23
38
34
33
35
32
30
29
31
28
26
27
12
25
24 37
RST
LDO
VDD
GND
OSC0
OSC1
PA0/U0Rx
PA1/U0Tx
PA2/SSIClk
PA3/SSIFss
VDD
GND
PB7/TRST
PA4/SSIRx PC0/TCK/SWCLK
PA5/SSITx PC1/TMS/SWDIO
VDD PC2/TDI
VDD
GND
GND PC3/TDO/SWO
ADC0
PE1/PWM5
PC5
PD7
ADC1
PC4
PE3/CCP1
PE2
PC7/CCP4
PD6/Fault
PD5/CCP2
PD4/CCP0
PB4
PB5/CCP5
PB6
PB3/I2CSDA
PB2/I2CSCL
PE0/PWM4
PB1/PWM3
PB0/PWM2
PD3/U1Tx
PD1/PWM1
PD2/U1Rx
PC6/CCP3
LM3S610
PD0/PWM0
1 36
13 48
2
14
5
6
3
4
7
8
11
9
10
47
15
46
16 45
17 44
18
43
19
42
20 41
21 40
22
39
23
38
34
33
35
32
30
29
31
28
26
27
12
25
24 37
RST
LDO
VDD
GND
OSC0
OSC1
PA0/U0Rx
PA1/U0Tx
PA2/SSIClk
PA3/SSIFss
VDD
GND
PB7/TRST
PA4/SSIRx PC0/TCK/SWCLK
PA5/SSITx PC1/TMS/SWDIO
VDD PC2/TDI
VDD
GND
GND PC3/TDO/SWO
ADC0
PE1/PWM5
PC5
PD7
ADC1
PC4
PE3/CCP1
PE2
PC7/CCP4
PD6/Fault
PD5/CCP2
PD4/CCP0
PB4
PB5/CCP5
PB6
PB3/I2CSDA
PB2/I2CSCL
PE0/PWM4
PB1/PWM3
PB0/PWM2
PD3/U1Tx
PD1/PWM1
PD2/U1Rx
PC6/CCP3
LM3S610
PD0/PWM0