Pulse Width Modulator (PWM)
348 October 8, 2006
Preliminary
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C
This register provides a summary of the interrupt status of the individual PWM generator blocks. A
bit set to 1 indicates that the corresponding generator block is asserting an interrupt. The individual
interrupt status registers in each block must be consulted to determine the reason for the interrupt,
and used to clear the interrupt. For the fault interrupt, a write of 1 to that bit position clears the
latched interrupt status.
Bit/Field Name Type Reset Description
31:17 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
16 IntFault R/W1C 0 Indicates if the fault input is asserting an interrupt.
15:3 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
2 IntPWM2 RO 0 Indicates if the PWM generator 2 block is asserting an
interrupt.
1 IntPWM1 RO 0 Indicates if the PWM generator 1 block is asserting an
interrupt.
0 IntPWM0 RO 0 Indicates if the PWM generator 0 block is asserting an
interrupt.
reserved
RO
0
PWM Interrupt Status and Clear (PWMISC)
Offset 0x01C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO R/W1C
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
reserved
IntPWM0
IntPWM1IntPWM2
IntFault
