Pulse Width Modulator (PWM)
346 October 8, 2006
Preliminary
Register 6: PWM Interrup t Enable (PWMINTEN), offset 0x014
This register controls the global interrupt generation capabilities of the PWM module. The events
that can cause an interrupt are the fault input and the individual interrupts from the PWM
generators.
Bit/Field Name Type Reset Description
31:17 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
16 IntFault R/W 0 When 1, an interrupt occurs when the fault input is
asserted.
15:3 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
2 IntPWM2 R/W 0 When 1, an interrupt occurs when the PWM generator 2
block asserts an interrupt.
1 IntPWM1 R/W 0 When 1, an interrupt occurs when the PWM generator 1
block asserts an interrupt.
0 IntPWM0 R/W 0 When 1, an interrupt occurs when the PWM generator 0
block asserts an interrupt.
reserved
RO
0
PWM Interrupt Enable (PWMINTEN)
Offset 0x014
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO R/W
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO R/W R/W R/W
reserved
IntPWM0
IntPWM1IntPWM2
IntFault