Inter-Integrated Circuit (I2C) Interface
316 October 8, 2006
Preliminary
Master
Transmit
X X 0 0 1 SEND operation (master remains in
Master Transmit state).
X X 1 0 0 STOP condition (master goes to Idle
state).
X X 1 0 1 SEND followed by STOP condition
(master goes to Idle state).
0 X 0 1 1 Repeated START condition followed by a
SEND (master remains in Master
Tran smit sta te).
0 X 1 1 1 Repeated START condition followed by
SEND and STOP condition (master goes
to Idle state).
1 0 0 1 1 Repeated START condition followed by a
RECEIVE operation with a negative ACK
(master goes to Master Receive state).
1 0 1 1 1 Repeated START condition followed by a
SEND and STOP condition (master goes
to Idle state).
1 1 0 1 1 Repeated START condition followed by
RECEIVE (mas ter go es to Master
Receive state).
1 1 1 1 1 Illegal.
All other co mb ina tio ns not lis ted are non-op erations. NO P.
Table 14-3. Write Field Decoding for I2CMCS[3:0] Field (Sheet 2 of 3)
Current
State
I2CMSA[0] I2CMCS[3:0]
Description
R/S ACK STOP START RUN