LM3S610 Data Sheet
October 8, 2006 305
Preliminary
Figure 14-8. Master Single RECEIVE
Idle
write Sl ave Address
to I2CMSA
read I2CMCS
Bus Busy=0
N
Y
Sequence may be omitted in a
Single Master system
write “- --0-111”
to I2CMSA
read I2C M CS
Bus Busy=0
N
Y
Error=0
N
Y
Error Service
Idle
read Data from
I2CMDR
Idle