LM3S610 Data Sheet
October 8, 2006 29
Preliminary
The SSI module also includes a programmable bit rate clock divider and prescaler to generate the
output serial clock derived from the SSI module’s input clock. Bit rates are generated based on the
input clock and the maximum bit rate is determined by the connected peripheral.
1.4.4.3 I
2
C (Section 14 on page 301)
The Inter-Integrated Circuit (I
2
C) bus provides bi-directional data transfer through a two-wire
design (a serial data line SDA and a serial clock line SCL).
The I
2
C bus interfaces to external I
2
C devices such as serial memory (RAMs and ROMs),
networking devices, LCDs, tone generators, and so on. The I
2
C bus may also be used for system
testing and diagnostic purposes in product development and manufacture.
The Stellaris I
2
C module provides the ability to communicate to other IC devices over an I
2
C bus.
The I
2
C bus supports devices that can both transmit and receive (write and read) data.
Device s o n th e I
2
C bus can be designated as either a master or a slave. The I
2
C module supports
both sending and receiving data as either a master or a slave, and also supports the simultaneous
operation as both a master and a slave. The four I
2
C modes are: Master Transmit, Master
Receive, Slave Transmit, and Slave Receive.
The Stellaris I
2
C module can operate at two speeds: Standard (100 Kbps) and Fast (400 Kbps).
Both the I
2
C master and slave can generate interrupts. The I
2
C master generates interrupts when
a transmit or receive operation completes (or aborts due to an error). The I
2
C slave generates
interrupts when data has been sent or requested by a master.
1.4.5 System Peripherals
1.4.5.1 Programmable GPIOs (Section 8 on page 107)
General-purpose input/output (GPIO) pins offer flexibility for a variety of connections.
The Stellaris GPIO module is composed of five physical GPIO blocks, each corresponding to an
individual GPIO port. The GPIO module is FiRM-compliant (compliant to the ARM Foundation IP
for Real-T ime Microcontrollers specification) and supports 6 to 34 programmable input/output pins.
The number of GPIOs available depends on the peripherals being used (see Table 17-4 on
page 374 for the signals available to each GPIO pin).
The GPIO module features programmable interrupt generation as either edge-triggered or
level-sensitive on all pins, programmable control for GPIO pad configuration, and bit masking in
both read and write operations through address lines.
1.4.5.2 Three Programmable Timers (Section 9 on page 145)
Programmable timers can be used to count or time external events that drive the Timer input pins.
The Stellaris General-Purpose Timer Module (GPTM) contains three GPTM blocks. Each GPTM
block provides two 16-bit timer/counters that can be configured to operate independently as timers
or event counters, or configured to operate as one 32-bit timer or one 32-bit Real-Time Clock
(RTC). Timers can also be used to trigger analog-to-digital (ADC) conversions.
When configured in 32-bit mode, a timer can run as a one-shot timer, periodic timer, or Real-Time
Clock (RTC). When in 16-bit mode, a timer can run as a one-shot timer or periodic timer, and can
extend its precision by using an 8-bit prescaler. A 16-bit timer can also be configured for event
capture or Pulse Width Modulation (PWM) generation.
1.4.5.3 Watchdog Timer (Section 10 on page 177)
A watchdog timer can generate nonmaskable interrupts (NMIs) or a reset when a time-out value is
reached. The watchdog timer is used to regain control when a system has failed due to a software
error or to the failure of an external device to respond in the expected way.
