LM3S610 Data Sheet
October 8, 2006 257
Preliminary
Register 16: UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC
The UARTPeriphIDn registers are hard-coded and the fields within the registers determine the
reset values.
Bit/Field Name Type Reset Description
31:8 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
7:0 PID7 RO 0x00 UART Peripheral ID Register[31:24]
reserved
RO
0
UART Peripheral Identification 7 (UARTPeriphID7)
Offset 0xFDC
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
1514131211109876543210
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
reserved
PID7