Universal Asynchronous Receivers/Transmitters (UARTs)
250 October 8, 2006
Preliminary
5 TXIM R/W 0 UART Transmit Interrupt Mask
On a read, the current mask for the TXIM interrupt is returned.
Setting this bit to 1 promotes the TXIM interrupt to the interrupt
controller.
4 RXIM R/W 0 UART Receive Interrupt Mask
On a read, the current mask for the RXIM interrupt is returned.
Setting this bit to 1 promotes the RXIM interrupt to the interrupt
controller.
3:0 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
Bit/Field Name Type Reset Description