LM3S610 Data Sheet
October 8, 2006 249
Preliminary
Register 9 : UART Interrupt Mask (UARTIM), offset 0x038
The UARTIM register is the interrupt mask set/clear register.
On a read, this register gives the current value of the mask on the relevant interrupt. Writing a 1 to
a bit allows the corresponding raw interrupt signal to be routed to the interrupt controller. Writing a
0 prevents the raw interrupt signal from being sent to the interrupt controller.
Bit/Field Name Type Reset Description
31:11 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
10 OEIM R/W 0 UART Overrun Error Interrupt Mask
On a read, the current mask for the OEIM interrupt is returned.
Setting this bit to 1 promotes the OEIM interrupt to the interrupt
controller.
9 BEIM R/W 0 UART Break Error Interrupt Mask
On a read, the current mask for the BEIM interrupt is returned.
Setting this bit to 1 promotes the BEIM interrupt to the interrupt
controller.
8 PEIM R/W 0 UART Parity Error Interrupt Mask
On a read, the current mask for the PEIM interrupt is returned.
Setting this bit to 1 promotes the PEIM interrupt to the interrupt
controller.
7 FEIM R/W 0 UART Framing Error Interrupt Mask
On a read, the current mask for the FEIM interrupt is returned.
Setting this bit to 1 promotes the FEIM interrupt to the interrupt
controller.
6 RTIM R/W 0 UART Receive Ti me-Out Interrupt Mask
On a read, the current mask for the RTIM interrupt is returned.
Setting this bit to 1 promotes the RTIM interrupt to the interrupt
controller.
reserved
RO
0
UART Interrupt Mask (UARTIM)
Offset 0x038
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
00000000000 0000
RO RO RO RO R/W R/W R/W R/W R/W R/W R/W RO RO RO RO
OEIM
reserved
BEIM
PEIM FEIM
RTIM
TXIM
RXIM
reserved