Analog-to-Digital Converter (ADC)
226 October 8, 2006
Preliminary
Register 23: ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0
This register defines the analog input configuration for each sample in a sequence executed with
Sample Sequencer 3.
This register is 4-bits wide and contains information for one possible sample. This register’s bit
fields are as shown in the diagram below. Bit field definitions are the same as those in the
ADCSSMUX0 register ( see page 216) but are for Sample Sequencer 3.
reserved
reserved
RO
0
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3)
Offset 0x0A0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO R/W
MUX0