Analog-to-Digital Converter (ADC)
224 October 8, 2006
Preliminary
Register 19: ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080
This register defines the analog input configuration for each sample in a sequence executed with
Sample Sequencer 2.
This register is 16-bits wide and contains information for four possible samples. This register’s bit
fields are as shown in the diagram below. Bit field definitions are the same as those in the
ADCSSMUX0 register (see page 216) but are for Sample Sequencer 2.
reserved
reserved
reserved
reserved
reserved
RO
0
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2)
Offset 0x080
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RO
0
Reset
Type
000000000000000
RO RO R/W RO RO RO R/W RO RO RO R/W RO R0 RO R/W
MUX3
MUX2
MUX1
MUX0