Analog-to-Digital Converter (ADC)
220 October 8, 2006
Preliminary
Register 13: ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048
This register contains the conversion results for samples collected with Sample Sequencer 0.
Reads of this register return conversion result data in the order sample 0, sample 1, and so on,
until the FIFO is empty. If the FIFO is not properly handled by software, overflow and underflow
conditions are registered in the ADCOSTAT and ADCUSTAT regi sters.
Bit/Field Name Type Reset Description
31:10 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
9:0 DATA RO 0 Conversi on res ult data.
reserved
RO
0
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0)
Offset 0x048
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
reserved
DATA