LM3S610 Data Sheet
October 8, 2006 173
Preliminary
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040
This register effectively extends the range of GPTMTAMATCHR to 24 bits.
Bit/Field Name Type Reset Description
31:8 reserved RO 0 Reserved bits return an indeterm inat e value, and should never
be changed.
7:0 TAPSMR R/W 0 GPTM TimerA Prescale Match
This valu e is us ed alon gside GPTMTAMATCHR to detect timer
match events while using a prescaler.
reserved
RO
0
GPTM TimerA Prescale Match (GPTMTAPMR)
Offset 0x040
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO R/W R/W R/W R/W R/W R/W R/W R/W
reserved
TAPSMR