General-Purpose Input/Outp uts (GPIOs)
142 October 8, 2006
Preliminary
Register 28: GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4
The GPIOPCellID0, GPIOPCellID1, GPIOPCellID2, and GPIOPCellID3 re gister s are four 8-bit
wide registers, that can conceptually be treated as one 32-bit register. The register is used as a
standard cross-peripheral identification system.
Bit/Field Name Type Reset Description
31:8 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
7:0 CID1 RO 0xF0 GPIO PrimeCel l ID Regi ste r [15 :8]
Provides software a standard cross-peripheral identification
system.
reserved
RO
0
GPIO Primecell Identification 1 (GPIOPCellID1)
Offset 0xFF4
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000011110000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
reserved
CID1