LM3S610 Data Sheet
October 8, 2006 121
Preliminary
Register 7: GPIO Raw Interrupt Status (GPIORIS), offset 0x414
The GPIORIS register is the raw interrupt status register. Bits read High in GPIORIS reflect the
status of interrupt trigger conditions detected (raw, prior to masking), indicating that all the
requirements have been met, before they are finally allowed to trigger by the GPIO Interrupt
Mask (GPIOIM) register (see page 120). Bits read as zero indicate that corresponding input pins
have not initiated an interrupt. All bits are cleared by a reset.
Bit/Field Name Type Reset Description
31:8 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
7:0 RIS RO 0x00 GPIO Interrupt Raw Status
Reflect the status of interrupt trigger condition detection on pins
(raw, prior to masking).
0: Corresponding pin interrupt requirements not met.
1: Correspo ndi ng pin interru pt has me t requirements.
reserved
RO
0
GPIO Raw Interrupt Status (GPIORIS)
Offset 0x414
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
1514131211109876543210
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
reserved
RIS