General-Purpose Input/Outp uts (GPIOs)
118 October 8, 2006
Preliminary
Register 4: GPIO Interrupt Both Edges (GPIOIBE), offset 0x408
The GPIOIBE register is the interrupt both-edges register . When the corresponding bit in the GPIO
Interrupt Sense (GPIOIS) register (see page 117) is set to detect edges, bits set to High in
GPIOIBE configure the corresponding pin to detect both rising and falling edges, regardless of the
corresponding bit in the GPIO Interrupt Event (GPIOIEV) register (see page 119). Clearing a bit
configures the pin to be controlled by GPIOIEV. All bits are cleared by a reset.
Bit/Field Name Type Reset Description
31:8 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
7:0 IBE R/W 0x00 GPIO Interrupt Both Edge s
0: Interrupt g eneration is con trolled by the GPIO Interrupt Event
(GPIOIEV) register (see page 142).
1: Both edges on the corres pon din g pin trig ger an inte rrup t .
Note: Single edge is determined by the corresponding bit in
GPIOIEV.
reserved
RO
0
GPIO Interrupt Both Edges (GPIOIBE)
Offset 0x408
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO R/W R/W R/W R/W R/W R/W R/W R/W
reserved
IBE
