LM3S610 Data Sheet
October 8, 2006 117
Preliminary
Register 3: GPIO Interrupt Sense (GPIOIS), offset 0x404
The GPIOIS register is the interrupt sense register. Bits set to 1 in GPIOIS configure the
corresponding pins to detect levels, while bits set to 0 configure the pins to detect edges. All bits
are cleared by a reset.
Bit/Field Name Type Reset Description
31:8 reserved RO 0 Reserved bits return an indeterminate value, and should never
be changed.
7:0 IS R/W 0x00 GPIO Interrupt Sense
0: Edge on corresponding pin is detected (edge-sensitive).
1: Level on corresponding pin is detected (level-sensitive).
reserved
RO
0
GPIO Interrupt Sense (GPIOIS)
Offset 0x404
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
000000000000000
RO RO RO RO RO RO RO R/W R/W R/W R/W R/W R/W R/W R/W
reserved
IS