Internal Memory
104 October 8, 2006
Preliminary
Register 7: Flash Controller Raw Interrupt Status (FCRIS), offset 0x00C
This register indicates that the flash controller has an interrupt condition. An interrupt is only
signaled if the corresponding FCIM register bit is set.
Bit/Field Name Type Reset Description
31:2 reserved RO 0 Reserved bits return an indeterminate value, and should
never be changed.
1 PRIS RO 0 Programming Raw Interrupt Status
This bit indicates the current state of the prog ramming
cycle. If set, the prog ram ming cy cl e com ple ted ; if cleared,
the programming cycle has not completed. Programming
cycles are either write or erase actions generated through
the Flash Memory Control (FMC) register bi ts (see
page 102).
0 ARIS RO 0 Access Raw Interrupt Status
This bit indicates if the flash was improperly accessed. If
set, the program tried to access the flash counter to the
policy as set in the Flash Memory Protection Read
Enable (FMPRE) and Flash Memory Prote ction Program
Enable (FMPPE) registers (see page 98). Otherwise, no
access has tried to improperly access the flash.
reserved
RO
0
Flash Controller Raw Interrupt Status (FCRIS)
Offset 0x00C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset
Type
000000000000000
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
RO
0
Reset
Type
00000000000000 0
RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
ARIS
reserved
PRIS
