Lattice Semiconductor ispXPGA Family Data Sheet
17
Table 5. ispXPGA Supported I/O Standards
Table 6. Differential Interface Standard Support
1
sysIO Standard V
CCO
V
REF
V
TT
LVTTL 3.3V N/A N/A
LVCMOS-3.3 3.3V N/A N/A
LVCMOS-2.5 2.5V N/A N/A
LVCMOS-1.8 1.8V N/A N/A
PCI 3.3V N/A N/A
AGP-1X 3.3V N/A N/A
SSTL3, Class I, II 3.3V 1.5V 1.5V
SSTL2, Class I, II 2.5V 1.25V 1.25V
HSTL, Class I 1.5V 0.75V 0.75V
HSTL, Class III 1.5V 0.9V 1.5V
GTL+ N/A 1.0V 1.5V
LVPECL 3.3V N/A N/A
LVDS
1
2.5V N/A N/A
BLVDS 2.5V N/A N/A
1. V
CCO
must be 2.5V for high speed serial operations (sysHSI block).
sysIO Buffer Not Using sysHSI Block sysIO Buffer Using sysHSI Block
LVDS
Driver Supported with external resistor network Supported
Receiver Supported with standard termination Supported with standard termination
BLVDS
Driver Supported with external resistor network Not supported
Receiver Supported (may need termination) Supported (may need termination)
LVPECL
Driver Supported with external resistor network Not supported
Receiver Supported with termination Supported with termination
1. For more information, refer to Lattice technical note TN1000, sysIO Usage Guidelines, available at www.latticesemi.com.
