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LFEC1E-5F900I

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型号: LFEC1E-5F900I
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  • LFEC1E-5F900I PDF文件
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功能描述: LatticeECP/EC Family Data Sheet
PDF文件大小: 557.69 Kbytes
PDF页数: 共117页
制造商: LATTICE[Lattice Semiconductor]
制造商LOGO: LATTICE[Lattice Semiconductor] LOGO
制造商网址: http://www.latticesemi.com
捡单宝LFEC1E-5F900I
PDF页面索引
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2-5
Architecture
Lattice Semiconductor LatticeECP/EC Family Data Sheet
Modes of Operation
Each Slice is capable of four modes of operation: Logic, Ripple, RAM and ROM. The Slice in the PFF is capable of
all modes except RAM. Table 2-2 lists the modes and the capability of the Slice blocks.
Table 2-2. Slice Modes
Logic Mode:
In this mode, the LUTs in each Slice are congured as 4-input combinatorial lookup tables. A LUT4
can have 16 possible input combinations. Any logic function with four inputs can be generated b y programming this
lookup table. Since there are two LUT4s per Slice, a LUT5 can be constructed within one Slice. Larger lookup
tables such as LUT6, LUT7 and LUT8 can be constructed by concatenating other Slices.
Ripple Mode:
Ripple mode allo ws the efcient implementation of small arithmetic functions. In ripple mode, the fol-
lowing functions can be implemented by each Slice:
Addition 2-bit
Subtraction 2-bit
Add/Subtract 2-bit using dynamic control
Up counter 2-bit
•Down counter 2-bit
Ripple mode multiplier building block
Comparator functions of A and B inputs
-A greater-than-or-equal-to B
-A not-equal-to B
-A less-than-or-equal-to B
Two additional signals: Carry Generate and Carry Propagate are generated per Slice in this mode, allowing fast
arithmetic functions to be constructed by concatenating Slices.
RAM Mode:
In this mode, distributed RAM can be constructed using each LUT block as a 16x1-bit memory.
Through the combination of LUTs and Slices, a variety of different memories can be constructed.
The Lattice design tools suppor t the creation of a variety of different size memor ies. Where appropriate, the soft-
ware will construct these using distributed memory pr imitives that represent the capabilities of the PFU. Table 2-3
shows the number of Slices required to implement different distributed RAM primitives. Figure 2-5 shows the dis-
tributed memory primitive block diagr ams. Dual port memories inv olve the pairing of two Slices, one Slice functions
as the read-write port. The other companion Slice supports the read-only port. For more information on using RAM
in LatticeECP/EC devices, please see details of additional technical documentation at the end of this data sheet.
Table 2-3. Number of Slices Required For Implementing Distributed RAM
Logic Ripple RAM ROM
PFU Slice LUT 4x2 or LUT 5x1 2-bit Arithmetic Unit SPR16x2 ROM16x1 x 2
PFF Slice LUT 4x2 or LUT 5x1 2-bit Arithmetic Unit N/A ROM16x1 x 2
SPR16x2 DPR16x2
Number of slices 1 2
Note: SPR = Single Port RAM, DPR = Dual Port RAM
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