4-4
Pinout Information
Lattice Semiconductor LatticeECP/EC Family Data Sheet
Pin Information Summary
LFECP6/EC6 LFECP20/EC20
Pin Type 144-TQFP 208-PQFP 256-fpBGA 484-fpBGA 484-fpBGA 672-fpBGA
Single Ended User I/O 97 147 195 224 360 400
Differential Pair User I/O 72 97 97 112 180 200
Configuration
Dedicated 13 13 13 13 13 13
Muxed 48 48 48 48 56 56
TAP 555555
Dedicated (total without supplies) 110 160 208 373 373 509
V
CC
441020 20 32
V
CCAUX
2421212 20
V
CCIO
Bank0 232446
Bank1 222446
Bank2 122446
Bank3 222446
Bank4 222446
Bank5 232446
Bank6 222446
Bank7 122446
GND, GND0-GND7 14 18 20 44 44 63
NC 0 4 0 139 3 96
Single Ended/
Differential I/O
per Bank
Bank0 14 26 32 32 48 64
Bank1 13 17 18 32 48 48
Bank2 8 14 16 16 40 40
Bank3 13 16 32 32 44 48
Bank4 14 17 17 32 48 48
Bank5 13 26 32 32 48 64
Bank6 14 16 32 32 44 48
Bank7 8 15 16 16 40 40
V
CCJ
111111
Note: During configuration the user-programmable I/Os are tri-stated with an internal pull-up resistor enabled. If any pin is not used (or not
bonded to a package pin), it is also tri-stated with an internal pull-up resistor enabled after configuration.