3-8
DC and Switching Characteristics
Lattice Semiconductor LatticeECP/EC Family Data Sheet
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementar y single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
BLVDS
The LatticeECP/EC devices suppor t BLVDS standard. This standard is emulated using complementary LVCMOS
outputs in conjunction with a parallel external resistor across the driver outputs. BLVDS is intended for use when
multi-drop and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-1 is one
possible solution for bi-directional multi-point differential signals.
Figure 3-1. BLVDS Multi-point Output Example
Table 3-1. BLVDS DC Conditions
1
Over Recommended Operating Conditions
Typical
Parameter Description Zo = 45 Zo = 90 Units
Z
OUT
Output impedance 100 100 ohm
R
TLEFT
Left end termination 45 90 ohm
R
TRIGHT
Right end termination 45 90 ohm
V
OH
Output high voltage 1.375 1.48 V
V
OL
Output low voltage 1.125 1.02 V
V
OD
Output differential voltage 0.25 0.46 V
V
CM
Output common mode voltage 1.25 1.25 V
I
DC
DC output current 11.2 10.2 mA
1. For input buffer, see LVDS table.
Heavily loaded backplane, effective Zo ~ 45 to 90 ohms differential
2.5V
80
80
80808080
45-90 ohms 45-90 ohms
80
2.5V
2.5V
2.5V 2.5V 2.5V 2.5V
2.5V
+
-
. . .
+
-
. . .
+
-
+
-
