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LFEC1E-5F900I

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型号: LFEC1E-5F900I
PDF文件:
  • LFEC1E-5F900I PDF文件
  • LFEC1E-5F900I PDF在线浏览
功能描述: LatticeECP/EC Family Data Sheet
PDF文件大小: 557.69 Kbytes
PDF页数: 共117页
制造商: LATTICE[Lattice Semiconductor]
制造商LOGO: LATTICE[Lattice Semiconductor] LOGO
制造商网址: http://www.latticesemi.com
捡单宝LFEC1E-5F900I
PDF页面索引
120%
2-17
Architecture
Lattice Semiconductor LatticeECP/EC Family Data Sheet
MULTADD sysDSP Element
In this case, the operands A0 and B0 are multiplied and the result is added/subtracted with the result of the multi-
plier operation of operands A1 and A2. The user can enable the input, output and pipeline registers. Figure 2-20
shows the MULTADD sysDSP element.
Figure 2-20. MULTADD
MULTADDSUM sysDSP Element
In this case, the operands A0 and B0 are multiplied and the result is added/subtracted with the result of the multi-
plier operation of operands A1 and B1. Additionally the operands A2 and B2 are multiplied and the result is added/
subtracted with the result of the multiplier operation of operands A3 and B3. The result of both addition/subtraction
are added in a summation block. The user can enable the input, output and pipeline registers. Figure 2-21 shows
the MULTADDSUM sysDSP element.
Multiplier
Multiplier
Add/Sub
Pipe
Reg
Pipe
Reg
n
m
m
n
m
n
m
n
n
m
m+n
(default)
m+n+1
(default)
m+n+1
(default)
m+n
(default)
x
x
n
m
m
n
m
n
n
m
Multiplier B0
Multiplicand A0
Multiplier B1
Multiplicand A1
Signed
Shift Register A InShift Register B In
Shift Register A OutShift Register B Out
Output
Addn
Pipeline
Register
CLK (CLK0,CLK1,CLK2,CLK3)
CE (CE0,CE1,CE2,CE3)
RST(RST0,RST1,RST2,RST3)
Input
Register
Pipeline
Register
Input
Register
Pipeline
Register
Pipeline
Register
Input Data
Register A
Input Data
Register A
Input Data
Register B
Input Data
Register B
Output
Register
To Add/Sub
To Add/Sub
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