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Pinout Information
Lattice Semiconductor MachXO Family Data Sheet
Thermal Management
Thermal management is recommended as part of any sound FPGA design methodology. To assess the thermal
characteristics of a system, Lattice specifies a maximum allowable junction temperature in all device data sheets.
Designers must complete a thermal analysis of their specific design to ensure that the device and package do not
exceed the junction temperature limits. Refer to the Thermal Management document to find the device/package
specific thermal values.
For Further Information
For further information regarding Thermal Management, refer to the following located on the Lattice website at
www.latticesemi.com.
• Thermal Management document
• Technical Note TN1090 - Power Estimation and Management for MachXO Devices
• Power Calculator tool included with Lattice’s ispLEVER design tool, or as a standalone download from
www.latticesemi.com/software
